Testable Clock Routing Architecture for Field Programmable Gate Arrays.
L. Kalyan KumarAmol J. MupidAditya S. RamaniV. KamakotiPublished in: FPL (2003)
Keyphrases
- field programmable gate array
- fpga technology
- hardware implementation
- fpga device
- hardware design
- hardware architecture
- software implementation
- host computer
- fpga implementation
- hardware software
- pipelined architecture
- embedded systems
- digital signal processors
- hardware software co design
- reconfigurable hardware
- xilinx virtex
- parallel computing
- image processing algorithms
- high end
- programmable logic
- general purpose processors
- parallel architecture
- design methodology
- hardware and software
- routing protocol
- signal processing
- low cost
- digital signal processing
- image processing
- massively parallel
- hw sw
- high speed
- open source
- general purpose