Modeling of Leakage Current Mechanisms in Nanoscale DG MOSFET and its Application to Low Power SRAM Design.
Deblina SarkarDeepanjan DattaSudeb DasguptaPublished in: J. Comput. (2008)
Keyphrases
- low power
- power consumption
- single chip
- low power consumption
- low cost
- high speed
- logic circuits
- vlsi architecture
- digital signal processing
- cmos technology
- gate array
- power reduction
- mixed signal
- power dissipation
- high power
- vlsi circuits
- ultra low power
- design process
- power saving
- real time
- energy dissipation
- image processing algorithms
- hardware and software
- image processing