A 0.65-ns, 72-kb ECL-CMOS RAM macro for a 1-Mb SRAM.
Hiroalu NambuKazuo KanetaniYouji IdeiTom MasudaKeiichi HigetaMasayuki OhayashiMasami UsamiKunihiko YamaguchiToshiyuki KikuchiTakahide IkedaKenichi OhhataTakeshi KusunokiNoriyuki HommaPublished in: IEEE J. Solid State Circuits (1995)