A 65fJ/Conversion-Step 0-to-50MS/s 0-to-0.7mW 9b Charge-Sharing SAR ADC in 90nm Digital CMOS.
Jan CraninckxGeert Van der PlasPublished in: ISSCC (2007)
Keyphrases
- power consumption
- analog to digital converter
- power supply
- metal oxide semiconductor
- hd video
- circuit design
- low cost
- cmos image sensor
- low power
- cmos technology
- charge coupled devices
- mixed signal
- data conversion
- single chip
- synthetic aperture radar
- post processing
- nm technology
- parameter estimation
- charge coupled device
- knowledge sharing
- wide dynamic range
- maximum likelihood
- high speed
- multiscale