A 1.2-V, 12-bit, 200M sample/s current-steering D/A converter in 90-nm CMOS.

Takeshi Ueno Takafumi Yamaji Tetsuro Itakura

Published in: CICC (2005)

Keyphrases

low voltage
random access memory
analog to digital converter
low cost
data sets
neural network
power consumption
cmos technology
analog vlsi
real time
genetic algorithm
high speed
input output
design considerations
circuit design
successive approximation