Software Pipelining for Coarse-Grained Reconfigurable Instruction Set Processors.
Francisco BaratMurali JayapalaPieter Op de BeeckGeert DeconinckPublished in: VLSI Design (2002)
Keyphrases
- instruction set
- coarse grained
- fine grained
- embedded systems
- floating point
- parallel processing
- application specific
- shared memory
- low cost
- computer architecture
- level parallelism
- general purpose
- multithreading
- memory subsystem
- software development
- protein sequences
- computer systems
- access control
- field programmable gate array
- memory access
- distributed memory
- fixed point
- software systems
- probabilistic model
- high level
- artificial intelligence