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Implementation of a Single Chip, Pipelined, Complex, One-Dimensional Fast FourierTransform in 0.25 mu m BulkCMOS.
Steven M. Currie
Paul R. Schumacher
Barry K. Gilbert
Earl E. Swartzlander Jr.
Barbara A. Randall
Published in:
ASAP (2002)
Keyphrases
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single chip
highly parallel
software implementation
low power
low cost
efficient implementation
high speed
power consumption
signal processor
real time
high quality
digital images
hardware and software