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A 10.0 ENOB, 6.2 fJ/conv.-step, 500 MS/s Ringamp-Based Pipelined-SAR ADC with Background Calibration and Dynamic Reference Regulation in 16nm CMOS.

Jorge LagosNereo MarkulicBenjamin P. HershbergDavide DermitM. ShrivasEwout MartensJan Craninckx
Published in: VLSI Circuits (2021)
Keyphrases
  • low cost
  • camera calibration
  • power consumption
  • high speed
  • image reconstruction
  • sar images
  • synthetic aperture radar
  • post processing