A 10.0 ENOB, 6.2 fJ/conv.-step, 500 MS/s Ringamp-Based Pipelined-SAR ADC with Background Calibration and Dynamic Reference Regulation in 16nm CMOS.
Jorge LagosNereo MarkulicBenjamin P. HershbergDavide DermitM. ShrivasEwout MartensJan CraninckxPublished in: VLSI Circuits (2021)