Impact of clock slope on energy/delay of pulsed flip-flops and optimum clock domain design.

Massimo Alioto Elio Consoli Gaetano Palumbo

Published in: ECCTD (2009)

Keyphrases

power dissipation
power consumption
high speed
efficient implementation
optimum design
low power
computer vision
video sequences
design process
cmos technology
flip flops