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A Phase-Selecting Digital Phase-Locked Loop With Bandwidth Tracking in 65-nm CMOS Technology.
Ping-Hsuan Hsieh
Jay Maxey
Chih-Kong Ken Yang
Published in:
IEEE J. Solid State Circuits (2010)
Keyphrases
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cmos technology
phase locked loop
low power
mixed signal
low voltage
spl times
power consumption
multipath
parallel processing
high voltage
power dissipation
low cost
silicon on insulator
real time
high speed
motion segmentation
image processing
image sensor
end to end
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