A 132.6-GHz Phase-Locked Loop in 65 nm Digital CMOS.

Bo-Yu Lin Shen-Iuan Liu

Published in: IEEE Trans. Circuits Syst. II Express Briefs (2011)

Keyphrases

phase locked loop
high speed
metal oxide semiconductor
multipath
high voltage
circuit design
power consumption
cmos technology
silicon on insulator
low cost
low power
nm technology
frequency domain
parallel processing
neural network
analog vlsi
cmos image sensor
response time
multiresolution