A Low Power 15-Bit Decimator in 0.18um CMOS for Biomedical Applications.

Kristin Scholfield Tom Chen

Published in: DSD (2013)

Keyphrases

low power
low cost
power consumption
high speed
single chip
high power
wireless transmission
vlsi architecture
nm technology
low power consumption
logic circuits
digital signal processing
analog to digital converter
vlsi circuits
gate array
video sequences
power reduction
delay insensitive
cmos technology