Improving the energy efficiency of a low-area SATD hardware architecture using fine grain PDE.
André Beims BräscherIsmael SeidelJosé Luís GüntzelPublished in: SBCCI (2017)
Keyphrases
- energy efficiency
- fine grain
- hardware architecture
- coarse grain
- energy consumption
- power consumption
- wireless sensor networks
- sensor networks
- data center
- hardware implementation
- routing protocol
- high performance computing
- response time
- parallel computation
- field programmable gate array
- smart home
- nested transactions
- distributed memory
- sensor nodes
- associative memory
- parallel algorithm
- image quality