Automatic Formal Verification of RISC-V Pipelined Microprocessors with Fault Tolerance by Spatial Redundancy at a High Level of Abstraction.
Miroslav N. VelevPublished in: iFM (2023)
Keyphrases
- fault tolerance
- formal verification
- high level
- fault tolerant
- bounded model checking
- high availability
- low level
- distributed systems
- load balancing
- model checking
- distributed computing
- response time
- instruction set
- peer to peer
- model checker
- mobile agents
- database replication
- replicated databases
- failure recovery
- error detection
- group communication
- symbolic model checking
- data replication
- high performance computing
- application specific
- automated verification
- knowledge base
- source code