A 4.9pJ/b 16-to-64Gb/s PAM-4 VSR transceiver in 28nm FDSOI CMOS.
Emanuele DepaoliEnrico MonacoGiovanni SteffanMarco MazziniHongyang ZhangWalter AudoglioOscar BelottiAugusto Andrea RossiGuido AlbasiniMassimo PozzoniSimone ErbaAndrea MazzantiPublished in: ISSCC (2018)
Keyphrases
- high speed
- cmos technology
- ultra low power
- silicon on insulator
- low power
- metal oxide semiconductor
- nm technology
- power consumption
- low cost
- image sensor
- low voltage
- circuit design
- vlsi circuits
- parallel processing
- analog vlsi
- cmos image sensor
- transmission electron microscopy
- power supply
- frequency response
- power dissipation
- integrated circuit
- phase locked loop
- real time
- ibm power processor
- delay insensitive
- dynamic range
- feature extraction