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An access-sequence control scheme to enhance random-access performance of embedded DRAM's.
Kazushige Ayukawa
Takao Watanabe
Susumu Narita
Published in:
IEEE J. Solid State Circuits (1998)
Keyphrases
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random access
control scheme
closed loop
control system
control strategy
dynamic model
flash memory
pid controller
embedded dram
image sequences
hard disk
random access memory
external memory