A New VLSI Architecture of Next-Generation QC-LDPC Decoder for 5G New-Radio Wireless-Communication Standard.
Anuj VermaRahul ShresthaPublished in: ISCAS (2020)
Keyphrases
- wireless communication
- low density parity check
- physical layer
- vlsi architecture
- wireless systems
- wireless networks
- low complexity
- wireless channels
- channel coding
- computer simulation
- ldpc codes
- wireless sensor networks
- communication networks
- turbo codes
- vlsi implementation
- low power
- error correction
- decoding algorithm
- distributed video coding
- real time
- cognitive radio
- unequal error protection
- application layer
- error resilient
- image transmission
- network layer
- low cost