A Digital Hardware Fast Algorithm and FPGA-based Prototype for a Novel 16-point Approximate DCT for Image Compression Applications.
Fábio M. BayerRenato J. CintraAmila EdirisuriyaArjuna MadanayakePublished in: CoRR (2017)
Keyphrases
- image compression
- preprocessing
- hardware architecture
- learning algorithm
- objective function
- computational complexity
- hardware implementation
- detection algorithm
- expectation maximization
- probabilistic model
- karhunen loeve transform
- digital straight line
- simulated annealing
- low cost
- genetic algorithm
- real time
- dynamic programming
- np hard
- search space
- vector quantization
- lower bound
- optimal solution
- vlsi implementation
- similarity measure