A reconfigurable floating-point FFT architecture.

Chenlu Wu Wei Cao Xuegong Zhou Lingli Wang Fang Wang Baodi Yuan

Published in: ASICON (2013)

Keyphrases

floating point
floating point arithmetic
instruction set
fast fourier transform
fixed point
square root
sparse matrices
hardware implementation
low cost
floating point unit
general purpose
level parallelism
frequency domain
graphics processing units
dynamic reconfiguration