Design of low power fault tolerant flash ADC for instrumentation applications.
G. PrathibaM. SanthiPublished in: Microelectron. J. (2020)
Keyphrases
- fault tolerant
- low power
- single chip
- fault tolerance
- low cost
- high speed
- vlsi architecture
- low power consumption
- logic circuits
- power consumption
- gate array
- digital signal processing
- cmos technology
- distributed systems
- power reduction
- safety critical
- load balancing
- design process
- ultra low power
- response time
- high power
- mixed signal
- vlsi circuits
- high assurance
- analog to digital converter
- error detection
- multi channel