A Novel Low Power 1 GS/s S&H Architecture With Improved Analog Bandwidth.
Arashk Norouzpour-ShiraziS. Arash MirhajShahin Jafarabadi-AshtianiOmid ShoaeiPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2008)
Keyphrases
- low power
- vlsi architecture
- mixed signal
- power consumption
- high speed
- low cost
- energy dissipation
- vlsi circuits
- single chip
- cmos image sensor
- digital signal processing
- multi channel
- logic circuits
- low power consumption
- cmos technology
- high power
- wireless transmission
- image sensor
- low complexity
- gate array
- vlsi implementation
- real time
- digital circuits
- signal processor
- signal processing
- ultra low power