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A four-channel 3.125-Gb/s/ch CMOS serial-link transceiver with a mixed-mode adaptive equalizer.
Jinwook Kim
Jeongsik Yang
Sangjin Byun
Hyunduk Jun
Jeongkyu Park
C. S. G. Conroy
Beomsup Kim
Published in:
IEEE J. Solid State Circuits (2005)
Keyphrases
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mixed mode
high speed
decision feedback
low cost
computer simulation
power consumption
ultra low power
multi channel
wireless systems
ultra wideband
database
data analysis
query processing
data model
building blocks
computer aided