A low-power pipelined MAC architecture using Baugh-Wooley based multiplier.
Rakesh WarrierChan Hua VunWei ZhangPublished in: GCCE (2014)
Keyphrases
- low power
- vlsi architecture
- low cost
- power consumption
- high speed
- cmos technology
- mixed signal
- data flow
- hardware implementation
- nm technology
- low power consumption
- parallel architecture
- wireless transmission
- single chip
- real time
- high power
- image sensor
- vlsi circuits
- digital signal processing
- power reduction
- vlsi implementation
- associative memory
- signal processor
- ultra low power
- energy efficiency
- digital camera
- parallel processing
- image processing