A new hardware efficient reconfigurable fir filter architecture suitable for FPGA applications.
Asgar AbbaszadehAnasystem AzerbaijanKhosrov Dabbagh-SadeghipourPublished in: DSP (2011)
Keyphrases
- hardware implementation
- field programmable gate array
- hardware architecture
- reconfigurable hardware
- low cost
- software implementation
- hardware design
- vlsi implementation
- dedicated hardware
- fpga implementation
- xilinx virtex
- fpga technology
- hardware software
- efficient implementation
- parallel architecture
- fir filters
- general purpose processors
- pipelined architecture
- hardware architectures
- fpga device
- systolic array
- signal processing
- image processing algorithms
- hardware and software
- functional units
- hardware software co design
- impulse response
- digital signal
- finite impulse response
- image segmentation
- processing elements
- parallel computing
- embedded systems
- image compression
- feature extraction