Memory optimizations for packet classification algorithms in FPGA.
Viktor PusJuraj BlahoJan KorenekPublished in: DDECS (2010)
Keyphrases
- benchmark datasets
- classification algorithm
- machine learning algorithms
- learning algorithm
- memory usage
- preprocessing
- decision trees
- data structure
- pattern recognition
- memory requirements
- computational cost
- classification method
- hardware architectures
- classification scheme
- machine learning methods
- worst case
- significant improvement
- support vector machine svm
- computationally efficient
- image classification
- class labels
- supervised learning
- evolutionary algorithm
- feature space
- nearest neighbour
- feature selection
- limited memory
- software implementation
- machine learning