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A 2 x 24Gb/s Single-Ended Transceiver with Channel-Independent Encoder-Based Crosstalk Cancellation in 28nm CMOS.
Hongzhi Wu
Weitao Wu
Liping Zhong
Xuxu Cheng
Xiongshi Luo
Zhenghao Li
Dongfan Xu
Quan Pan
Published in:
A-SSCC (2023)
Keyphrases
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high speed
power consumption
noisy channel
low cost
error control
circuit design
wireless systems
cmos technology