A 230mV-950mV 2.8Tbps/W Unified SHA256/SM3 Secure Hashing Hardware Accelerator in 14nm Tri-Gate CMOS.
Vikram B. SureshSudhir SatpathySanu MathewMark A. AndersHimanshu KaulAmit AgarwalSteven HsuRam KrishnamurthyPublished in: ESSCIRC (2018)
Keyphrases
- cmos technology
- low cost
- nm technology
- silicon on insulator
- hash functions
- metal oxide semiconductor
- motion vectors
- power consumption
- low power
- hardware and software
- circuit design
- real time
- field programmable gate array
- image sensor
- computing systems
- low voltage
- massively parallel
- nearest neighbor search
- floating gate
- computer systems