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Low-power block-level instantaneous comparison 7T SRAM for dual modular redundancy.
Shunsuke Okumura
Yohei Nakata
Koji Yanagida
Yuki Kagiyama
Shusuke Yoshimoto
Hiroshi Kawaguchi
Masahiko Yoshimoto
Published in:
CICC (2011)
Keyphrases
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low power
power consumption
low cost
high speed
single chip
vlsi architecture
wireless transmission
cmos technology
low power consumption
high power
digital signal processing
image sensor
logic circuits
real time
mixed signal
vlsi circuits
power reduction