Mapping and Performance of DSP Benchmarks on a Medium-Grain Reconfigurable Architecture.

Mitchell J. Myjak Jonathan Larson José G. Delgado-Frias

Published in: ERSA (2006)

Keyphrases

reconfigurable architecture
systolic array
data flow
parallel architecture
signal processing
neural network
ontology mapping
digital signal processor
database
real world
genetic algorithm
pattern recognition
high speed
digital signal processing
real time image processing