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A current mode maximum winner-take-all circuit with low voltage requirement for min-sum analog iterative decoders.

Saied HematiAmir H. Banihashemi
Published in: ICECS (2003)
Keyphrases
  • low voltage
  • mixed signal
  • design considerations
  • cmos technology
  • power management
  • min sum
  • real time
  • evolutionary algorithm
  • signal processing
  • input output