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A 1 V 59 fJ/Step 15 MHz BW 74 dB SNDR continuous-time ΔΣ modulator with digital ELD compensation and multi-bit FIR feedback.
Yi Zhang
Chia-Hung Chen
Tao He
Xin Meng
Nancy Qian
Ed Liu
Phillip Elliott
Gabor C. Temes
Published in:
A-SSCC (2014)
Keyphrases
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delta sigma
analog to digital converter
multi step
sigma delta
markov processes
post processing
optimal control
high speed
database
noise shaping
image quality
markov chain
high frequency
feedback loop
filter design
iir filters
relevance feedback
state space