Scalable and small-sized power analyzer design with signal-averaging noise reduction for low-power IoT devices.
Ryosuke KitayamaTakashi TakenakaMasao YanagisawaNozomu TogawaPublished in: ISCAS (2016)
Keyphrases
- low power
- noise reduction
- power consumption
- low power consumption
- single chip
- high power
- power dissipation
- small sized
- low cost
- high speed
- vlsi architecture
- power reduction
- logic circuits
- ultra low power
- signal to noise ratio
- cmos technology
- noisy environments
- mixed signal
- gate array
- wiener filter
- digital signal processing
- hearing aids
- nm technology
- power saving
- edge preserving
- noise level
- high frequency
- noise cancellation
- signal processing
- real time
- image sensor
- median filter
- embedded systems
- vlsi circuits
- mobile devices
- design methodology