An Energy-Efficient Reliable Heterogeneous Uncore Architecture for Future 3D Chip-Multiprocessors.
Arghavan AsadMahdi FazeliMohammad Reza Jahed-MotlaghMahmood FathyFarah MohammadiPublished in: J. Circuits Syst. Comput. (2019)
Keyphrases
- multithreading
- analog vlsi
- high speed
- long term
- vlsi implementation
- parallel architecture
- energy efficient
- loosely coupled
- low cost
- sensor networks
- wireless sensor networks
- software architecture
- parallel implementation
- real time
- design considerations
- host computer
- management system
- network on chip
- distributed architecture
- parallel computing