Novel 7T sram cell for low power cache design.

Ramy E. Aly Md. Ibrahim Faisal Magdy A. Bayoumi

Published in: SoCC (2005)

Keyphrases

low power
power consumption
single chip
low cost
low power consumption
high speed
cmos technology
logic circuits
vlsi architecture
digital signal processing
power dissipation
gate array
ultra low power
power reduction
high power
vlsi circuits
mixed signal
real time
power management
digital circuits