Intrinsic evolvable hardware for combinatorial synthesis based on SoC+FPGA and GPU platforms.
Carlos Iván Camargo BareñoCesar Augusto Pedraza BonillaLuis Fernado NiñoJosé Ignacio Martinez TorrePublished in: GECCO (Companion) (2011)
Keyphrases
- evolvable hardware
- reconfigurable hardware
- hardware implementation
- evolutionary algorithm
- evolutionary computation
- parallel processing
- lossless image compression
- real time
- bio inspired
- field programmable gate array
- hardware software co design
- image filters
- digital circuits
- hardware and software
- parallel computing
- fault tolerant
- low cost
- embedded systems
- graphics processing units
- low power
- signal processing
- artificial neural networks
- genetic algorithm
- physical design
- hardware architecture
- computational intelligence
- object oriented