Login / Signup
A Cryo-CMOS SAR ADC With FIA Sampling Driver Enabled by Cryogenic-Aware Back-Biasing.
Gerd Kiene
Ramon W. J. Overwater
Masoud Babaie
Fabio Sebastiano
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2024)
Keyphrases
</>
synthetic aperture radar
analog to digital converter
high speed
electron microscopy
power consumption
single chip
sar images
low cost
sampling algorithm
low power
monte carlo
reinforcement learning
random sampling
power supply
sampled data
image reconstruction
sample size
analog vlsi
vlsi circuits