Login / Signup

Novel High Speed Vedic Multiplier Proposal Incorporating Adder Based on Quaternary Signed Digit Number System.

Preyesh Dalmia VikasAbhinav ParasharAkshi TomarNeeta Pandey
Published in: VLSI Design (2018)
Keyphrases
  • high speed
  • low power
  • neural network
  • genetic algorithm
  • web pages
  • web services
  • clustering algorithm
  • search algorithm
  • relational databases
  • special case
  • hidden markov models
  • small number
  • maximum number
  • floating point