Low Power Technology Mapping for LUT based FPGA "A Genetic Algorithm Approach".
Rohit PandeySantanu ChattopadhyayPublished in: VLSI Design (2003)
Keyphrases
- low power
- gate array
- high speed
- low cost
- genetic algorithm
- single chip
- power consumption
- wireless transmission
- low power consumption
- cmos technology
- power reduction
- logic circuits
- digital signal processing
- high power
- hardware and software
- vlsi architecture
- delay insensitive
- nm technology
- power dissipation
- mixed signal
- image sensor
- efficient implementation
- signal processing
- image processing