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A new efficient SC integrator scheme for high-speed low-power applications.
Francesco A. Amoroso
Andrea Pugliese
Gregorio Cappuccino
Published in:
Int. J. Circuit Theory Appl. (2012)
Keyphrases
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low power
high speed
power consumption
low cost
single chip
digital signal processing
high power
vlsi circuits
low power consumption
logic circuits
wireless transmission
frame rate
vlsi architecture
power reduction
digital camera
cmos technology