High-speed low-area-cost VLSI design of polar codes encoder architecture using radix-k processing engines.

Xin-Yu Shih Po-Chun Huang Yu-Chun Chen

Published in: GCCE (2016)

Keyphrases

vlsi design
high speed
real time
design methodology
fourier transform
error control
management system
rate distortion
processing elements
parallel architecture
gigabit ethernet
low complexity
floating point
error correction
frequency domain
image quality
software development