A 1.2V 86dB SNDR 500kHz BW Linear-Exponential Multi-Bit Incremental ADC Using Positive Feedback in 65nm CMOS.
Biao WangSai-Weng SinSeng-Pan UFranco MalobertiRui Paulo MartinsPublished in: A-SSCC (2019)
Keyphrases
- positive feedback
- analog to digital converter
- linear complexity
- negative feedback
- integer arithmetic
- shift register
- low cost
- random access memory
- nm technology
- high speed
- power consumption
- single chip
- positive and negative feedback
- silicon on insulator
- information retrieval
- power dissipation
- learning strategies
- online learning
- collaborative learning