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Design for Testability of CMOS Analog Sum-Product Error-Control Decoders.

Mimi YiuChris WinsteadVincent C. GaudetChristian Schlegel
Published in: IEEE Trans. Circuits Syst. II Express Briefs (2007)
Keyphrases
  • sum product
  • high speed
  • error control
  • analog to digital converter
  • power consumption
  • packet loss