VLSI layout and packaging of butterfly networks.
Chi-Hsiang YehBehrooz ParhamiEmmanouel A. VarvarigosHua LeePublished in: SPAA (2000)
Keyphrases
- high speed
- signal processing
- network structure
- graph layout
- social networks
- single chip
- network design
- neural network
- image processing
- network analysis
- high density
- low power
- vlsi design
- connectionist networks
- network parameters
- linear algebra
- heterogeneous networks
- real time
- community structure
- sensor networks
- machine learning
- databases