Parallel, Asynchronous Winner Selection Circuit for Hardware Implemented Self-Organizing Maps.
Tomasz TalaskaMarta KolasaRafal DlugoszPublished in: MIXDES (2018)
Keyphrases
- self organizing maps
- parallel hardware
- circuit design
- neural network
- digital circuits
- unsupervised learning
- competitive learning
- network anomaly detection
- neural gas
- massively parallel
- input data
- delay insensitive
- data sets
- k means
- low cost
- som neural network
- parallel computing
- shift register
- pipelined architecture
- graphics processing units
- shared memory
- parallel processing
- high speed
- image data
- similarity measure
- image processing
- data mining