Efficiency of body biasing in 90 nm CMOS for low power digital circuits.
Klaus von ArnimEduardo BorinskiPeter SeegebrechtHorst FiedlerRalf BrederlowRoland ThewesJörg BertholdChristian PachaPublished in: ESSCIRC (2004)
Keyphrases
- low power
- digital circuits
- mixed signal
- cmos technology
- power consumption
- high speed
- low cost
- vlsi circuits
- nm technology
- single chip
- high power
- circuit design
- data flow
- power reduction
- vlsi architecture
- power dissipation
- wireless transmission
- digital signal processing
- image sensor
- finite state machines
- multi channel
- computational complexity
- gate array
- ultra low power
- logic circuits
- cmos image sensor
- power saving
- delay insensitive
- dynamic systems