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A 28-nm 10-b 2.2-GS/s 18.2-mW Relative-Prime Time-Interleaved Sub-Ranging SAR ADC With On-Chip Background Skew Calibration.
Dong-Jin Chang
Michael Choi
Seung-Tak Ryu
Published in:
IEEE J. Solid State Circuits (2021)
Keyphrases
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power consumption
nm technology
single chip
cmos technology
wide range
camera calibration
high speed
synthetic aperture radar
low cost
sar images
silicon on insulator
low power
power supply
high density
vlsi implementation
gaze estimation
power management
power plant
analog vlsi
parallel processing