High speed multistage CMOS clock buffers with pulse width control loop.

Fenghao Mu Christer Svensson

Published in: ISCAS (2) (1999)

Keyphrases

high speed
multistage
control loop
pulse width
production system
control scheme
control system
closed loop
control strategy
low power
dynamic programming
single stage
stochastic optimization
focal plane
lot sizing
real time
stochastic programming
optimal policy
multistage stochastic
markov decision processes