A hardware complete detection mechanism for an energy efficient reconfigurable accelerator CMA.
Akihito TsusakaMai IzawaRie UnoNobuyuki OzakiHideharu AmanoPublished in: FPL (2013)
Keyphrases
- detection mechanism
- field programmable gate array
- low cost
- hardware implementation
- general purpose
- real time
- hardware architecture
- hardware and software
- step size
- computing systems
- embedded systems
- computer systems
- computing power
- image processing
- hardware software
- parallel implementation
- massively parallel
- energy efficient
- signal processing
- sensor networks
- wireless sensor networks
- compute intensive
- parallel hardware
- heterogeneous computing