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Design and anaylsis of a 2.5-Gbps optical receiver analog front-end in a 0.35-μm digital CMOS technology.
Wei-Zen Chen
Chao-Hsin Lu
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2006)
Keyphrases
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mixed signal
cmos technology
low power
cmos image sensor
multi channel
circuit design
single chip
digital circuits
solid state
design process
image sensor
power dissipation
spl times
low cost
user interface
dynamic range
embedded systems
low voltage
sigma delta