A CMOS/MTJ Based Novel Non-volatile SRAM Cell with Asynchronous Write Termination for Normally OFF Applications.
Kanika MongaNitin ChaturvediPublished in: VDAT (2019)
Keyphrases
- power consumption
- random access memory
- delay insensitive
- low power
- flash memory
- low voltage
- main memory
- low cost
- read write
- data storage
- cmos technology
- high speed
- file system
- data transmission
- design considerations
- data acquisition
- asynchronous circuits
- asynchronous communication
- term rewriting
- sensor networks
- single chip
- power supply
- power management
- index structure
- database
- cmos image sensor
- nm technology